How to Use a Logic Analyzer

How to Use a Logic Analyzer

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Although the operation of a logic analyzer may appear to be fairly complicated at first sight, a methodical approach to the use of one enables it to be set up correctly and to be used effectively. Once the probes are connected, the logic analyzer is programmed with the names of each signal. The analyzer can also associate several signals into groups so that they can be manipulated more easily.

Setting logic analyzer capture mode

With the basic set-up of the logic analyser complete the capture mode for the data needs to be chosen. This can be set to one of two modes:

  • Timing mode Using this mode signals are sampled at regular intervals based on an internal or external clock.
  • State mode Here one or more of the signals are defined as clocks, and data is sampled on the edges of these clocks.

Setting the logic analyzer trigger mode

Once the logic analyzer mode is chosen then the trigger condition can be set. There are two basic types of trigger mode available:

  • Pattern trigger: Setting trace specifications on a timing analyzer very different to setting trigger level and slope on an oscilloscope. Many logic analyzers trigger on a pattern of highs and lows across input lines. This equates to a certain data pattern on number appearing across a data bus for example. This can normally be set in binary (1's and 0's) hex, octal, ASCII, or decimal numbering. Using a hex format for defining the trigger point is particularly helpful when looking at buses that are 4, 8, 16, 24, or 32 bits wide.
  • Edge trigger: When the trigger level control on an oscilloscope is adjusted, this can be considered in the same way as setting the level of a voltage comparator that triggers when the input voltage crosses its threhold level. A timing analyzer works essentially the same on edge triggering except the trigger level is preset to logic threshold. While many logic devices are level-dependent, clock and control signals of these devices are often edge-sensitive. Edge triggering enables the data capture to starts when the device is clocked.

    The logic analyzer can capture data when the clock edge occurs (rising or falling) and catch all of the outputs of the shift register. In this case, the trace point would have to be delayed to take care of the propagation delay through the shift register.

With the trigger condition set, the logic analyzer can be set to run, triggering once only, or repeatedly. The data that is captured can then be displayed and analysed.

Logic analyzers are an essential tool for many applications where digital circuits employing a large number of lines that need to be monitored. They are used to assist in the development of many of the circuits involving digital hardware and software. By using a logic analyzer is it possible to be able to look at these lines in a practicable fashion and be able to trigger on a preset pattern of a given number of lines. In this way the events that happen after a predetermined occurrence can be viewed for investigation. This is invaluable in enabling fault finding of complex software driven circuits.

Although with the enormous increase in the complexity of circuits, other techniques are often applicable, logic analysers are still used for many applications

Watch the video: ESP32 Technical Tutorials: Using a logic analyzer (June 2022).


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